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Naysayers claimed P.A. Semi Inc. could never develop a freaking complicated 2GHz Power chip

Start-up semiconductor house P.A. Semi Inc has confounded the doubters and naysayers who claimed it could never develop a freaking complicated 2GHz Power chip - with every feature currently known to man - that typically consumes just 5W-13W - or worse case 25W with both of its cores running full tilt at 2GH and all its peripherals active.

Well, sounding a little surprised itself, it says it has and will be producing what it calls "the most power-efficient high-performance processor ever designed" in volume at some secret fab by the fourth quarter. For volume read tens of thousands initially.

It's sampling now with 10 alpha customers and claims some 130 initial customer engagements - as in 130 separate and distinct companies. Engineering samples run $700 apiece.

It's unclear what "initial customer engagement" means beyond maybe they'll return your phone call but VP of architecture and verification Peter Bannon, a former Intel Fellow who worked on the Itanium, says P.A. will be profitable next year on an $86 million investment so far.

Seems pretty aggressive for all the verification that customers have to do.

Anyway, it took the company, started by heavy-duty displaced Alpha talent, three years to turn out the 64-bit dual-core PA6T-1682M PWRficient chip, built on a 65nm process, and make it 300%-400% more power efficient than competitors like IBM's 970MP, AMD's Athlon64x2 and Intel's Core 2 Duo.

Freescale, which also makes Power chips, isn't in the running because its 8641D part is 32-bit and only tops out at 1.5GHz. Actually, since Freescale blew its performance and power goals and its due date, it probably creates an opportunity for P.A.

P.A. used Power simply because IBM was willing to license the architecture, avoiding any of the litigation that scarred the Intel-AMD relationship.

The widget, which can reportedly hit a mere 3.5W at 1.5GHz, is expected to turn up in the multibillion-dollar embedded computing and controls market in places like networking, wireless infrastructure, gaming and storage as well as with the military and aerospace.

The fab-less start-up has set up a global sales channel, subcontracting a lot of its distribution to third parties like Nu Horizons Electronics in the US, UK, India, Australia and China and Clavis Company in Japan. Together with inside sales, P.A. says it's got 300 people beating the bushes.

It's got an $8,500 evaluation kit, dubbed Electra, consisting of an ATX-style board with two native 1Gb Ethernet ports, one- four- and 16-lane PCIe and four DDR2 DIMM sockets. The board supports two chi-chi 10Gb Ethernet ports with an optional Network Adapter Pack and it includes open source-based firmware, OS and debug support.

The chip currently supports real-time Linux, QNX Neutrino and VxWorks and P.A. has an SDK, GNU-based software tools and hardware debug probes.

To get to market quickly, the company has set up a customer support portal, an e-mail support hot line, and both in-person and web-based training.

John Wakerly, the former CTO of Cisco Systems' Routing Technology Group and now a consulting professor at Stanford University, explains the chip's potential.

"In recent years," he says, "the sophistication and types of services applied to packets and streams in the Internet, and especially intranets, have redoubled at the same time that overall traffic is growing rapidly. The result is an astonishing increase in the number of general-purpose CPU instructions that must be executed within the network, creating a crucial need for high-performance, I/O-rich multi-core microprocessors that can pack large amounts of computing and packet-handling power within a small power envelope, such as those offered by P.A. Semi. The need for such 'platform processors' extends well beyond traditional routing control planes and data planes to the growing array of embedded network services, such as security, authentication, content customization, voice over IP, unified messaging and converged video solutions."

The 1682M qualifies as a so-called cost-efficient platform processor because it integrates what's typically a three- or five-chip set into a single chip. Each of the two cores has its own dual-integer, floating point and VMX vector processing units.

The company observes that it has three times the functionality embedded onto its single chip than the competition.

The chip, which P.A. developed from the ground up and protected by upwards of 50 patents, includes 2MB of L2 cache, two DDR2 memory controllers and hardware-assist engines for TCP/IP acceleration, security, CRC checksum and XOR computation. It'll support eight PCI Express controllers, two 10 gigE controllers and four gigE controllers that share 24 configurable SERCES lanes.

It also supports virtualization and partitioning, includes server-class reliability, and is binary compatible with existing Power applications. It claims high throughput at low latency.

Alpha customers include Curtiss-Wright Corporation, Extreme Engineering Solutions (X0ES), Mercury Computer Systems, Performance Technologies, Splitted-Desktop Systems and Themis Computer.

One chip does not make a company so P.A. is planning a single-core later this year that should dissipate 5W-10W at 1GHz-2GHz and a quad that doubles the cache and dissipates 25W at 1.5GHz.

About Security News Desk
SYS-CON's Security News desk trawls the world of security for news of software, hardware, products, and services that seems likely to be of interest to infosec professionals and summarizes them for easy assimilation by busy IT managers and staff.

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